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Node / ReticulumProjects / RNode_Firmware.git / commits / 4511a10

Commit 4511a10cc6ddba887271e6794d311adff720f96a

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Parents : 1afc9fd

Author : Mark Qvist <mark@unsigned.io>

Date : 2022-01-14T21:41:10+01:00

Improved T-Beam compatibility

Changes

3 files changed, 18 insertions(+), 12 deletions(-)

M Config.h +1 -1

M LoRa.cpp +7 -7

M RNode_Firmware.ino +10 -4

Diff

diff --git a/Config.h b/Config.h

index c58f42b..6deecd5 100644

--- a/Config.h

+++ b/Config.h

@@ -4,7 +4,7 @@

#define CONFIG_H

#define MAJ_VERS 0x01

- #define MIN_VERS 0x16

+ #define MIN_VERS 0x17

#define PLATFORM_AVR 0x90

#define PLATFORM_ESP32 0x80

diff --git a/LoRa.cpp b/LoRa.cpp

index 2b16e3a..304e2df 100644

--- a/LoRa.cpp

+++ b/LoRa.cpp

@@ -242,7 +242,7 @@ uint8_t LoRaClass::packetRssiRaw() {

return pkt_rssi_value;

}

-int LoRaClass::packetRssi() {

+int ISR_VECT LoRaClass::packetRssi() {

int pkt_rssi = (int)readRegister(REG_PKT_RSSI_VALUE) - RSSI_OFFSET;

int pkt_snr = packetSnr();

@@ -260,11 +260,11 @@ int LoRaClass::packetRssi() {

return pkt_rssi;

}

-uint8_t LoRaClass::packetSnrRaw() {

+uint8_t ISR_VECT LoRaClass::packetSnrRaw() {

return readRegister(REG_PKT_SNR_VALUE);

}

-float LoRaClass::packetSnr() {

+float ISR_VECT LoRaClass::packetSnr() {

return ((int8_t)readRegister(REG_PKT_SNR_VALUE)) * 0.25;

}

@@ -312,12 +312,12 @@ size_t LoRaClass::write(const uint8_t *buffer, size_t size)

return size;

}

-int LoRaClass::available()

+int ISR_VECT LoRaClass::available()

{

return (readRegister(REG_RX_NB_BYTES) - _packetIndex);

}

-int LoRaClass::read()

+int ISR_VECT LoRaClass::read()

{

if (!available()) {

return -1;

@@ -623,7 +623,7 @@ void ISR_VECT LoRaClass::handleDio0Rise()

}

-uint8_t LoRaClass::readRegister(uint8_t address)

+uint8_t ISR_VECT LoRaClass::readRegister(uint8_t address)

{

return singleTransfer(address & 0x7f, 0x00);

}

@@ -633,7 +633,7 @@ void LoRaClass::writeRegister(uint8_t address, uint8_t value)

singleTransfer(address | 0x80, value);

}

-uint8_t LoRaClass::singleTransfer(uint8_t address, uint8_t value)

+uint8_t ISR_VECT LoRaClass::singleTransfer(uint8_t address, uint8_t value)

{

uint8_t response;

diff --git a/RNode_Firmware.ino b/RNode_Firmware.ino

index 8bebf9e..00f11f9 100644

--- a/RNode_Firmware.ino

+++ b/RNode_Firmware.ino

@@ -193,10 +193,11 @@ void ISR_VECT receive_callback(int packet_size) {

#endif

}

} else {

+ // In promiscuous mode, raw packets are

+ // output directly to the host

+ read_len = 0;

#if MCU_VARIANT != MCU_ESP32

- // In promiscuous mode, raw packets are

- // output directly to the host

- read_len = 0;

last_rssi = LoRa.packetRssi();

last_snr_raw = LoRa.packetSnrRaw();

getPacketData(packet_size);

@@ -210,7 +211,6 @@ void ISR_VECT receive_callback(int packet_size) {

kiss_write_packet();

#else

- read_len = 0;

getPacketData(packet_size);

packet_ready = true;

#endif

@@ -700,6 +700,12 @@ void loop() {

#if MCU_VARIANT == MCU_ESP32

if (packet_ready) {

+ portENTER_CRITICAL(&update_lock);

+ last_rssi = LoRa.packetRssi();

+ last_snr_raw = LoRa.packetSnrRaw();

+ portEXIT_CRITICAL(&update_lock);

+ kiss_indicate_stat_rssi();

+ kiss_indicate_stat_snr();

kiss_write_packet();

}

#endif

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